Graphcore has developed and verified its M2000 AI platform using design and development tools from Mentor. It is based on the new Colossus GC200 IPU processor, which has 59.4 billion transistors on an 823-sqmm chip and is manufactured in TSMC's 7 nm processes.
This second-generation IPU (Intelligence Processing Unit) from Graphcore is one of the most complex processors ever produced. To overcome the associated design challenge, Graphcore utilized several Mentor solutions. A number of critical tasks had to be accomplished, including circuit verification, PCB design, protocol verification, thermal analysis, design-for-test (DFT) and commissioning of the advanced AI processor. The new M2000 AI platform consists of assemblies realized with the AI processors.
"Mentor's comprehensive portfolio of IC and PCB design automation tools provided us with the capacity and proven processes needed for a design of this scale," said Phil Horsfield, Vice President of Silicon at Graphcore. This unleashed the power of innovation and provided the necessary intellectual property (IP) protection. "The power and capacity of Mentor's solutions allowed us to optimize the entire hardware system and focus on our differentiating IP. The result is what we believe is a unique and compelling end product."
The Mentor tools used by Graphcore were:
- The Calibre platform with Calibre nmDRC solutions for physical verification and Calibre nmLVS for circuit verification. Graphcore also utilized Calibre YieldEnhancer with SmartFill to control design planarity and reduce cycle time across multiple design iterations.
- The Questa verification IP solution for PCI Express 4.0, which was used to verify the Graphcore IPU's PCIe Gen4, Ethernet and AMBA interconnect I/O buses. Questa technology provides a comprehensive verification solution for high-speed interconnects and includes models, coverage, checkers, sequences and test plans.
- Tessent Software's DFT platform, which helped address a wide range of design-for-test challenges. Using SiliconInsight benchtop test software, also from the Tessent portfolio, Graphcore validated all onboard logic BIST, ATPG and memory BIST elements well ahead of schedule.
- In developing the M2000 platform around the Colossus processors, Graphcore also utilized Mentor solutions for the important power and thermal management challenges that such a dense design inevitably brings. Performance has been optimized and design cycles drastically reduced. Graphcore designed the PCBs for the M2000 system using Xpedition Software's Concurrent Team Design platform and verified the system for performance and manufacturability during the PCB design process using HyperLynx's DRC tool, Valor's NPI software and Simcenter-Flotherm. All of these solutions are part of the portfolio of Siemens company Mentor Graphics, which is based in Wilsonville, Oregon.
The demand for increasingly sophisticated AI chips is driving leading EDA software providers to improve the capacity and scalability of their offerings across the entire design flow, said Adrian Buckley, Vice President Europe at Mentor. "We are delighted that Mentor has played such an important role in the development of one of the largest and most advanced AI platforms ever developed."
