The EMSA5-FS processor core developed by IPMS for functional safety based on the RISC-V open source instruction set architecture is supported by microprocessor development tools from Lauterbach - and therefore by another important debugging tool.
With this integration of the processor core into the toolsets of this leading manufacturer of microprocessor development tools, very extensive debug functions are now available for the 32-bit RISC-V core. The EMSA5-FS developed at the Fraunhofer Institute for Photonic Microsystems (IPMS) in Dresden was the first RISC-V processor core to be certified as ASIL-D ready in accordance with Automotive Functional Safety and is therefore suitable for use in safety-critical systems in vehicles.
It can be made available for any FPGA platform as well as integrated into customized ASICs for a wide range of foundry technologies. IPMS also offers services to extend the IP core with customized modules.
"The inclusion of the EMSA5-FS in the TRACE32 toolset is an important milestone for us," explains Marcus Pietzsch, Head of the IP Cores and ASIC Design group at IPMS. "Thanks to the close cooperation with Lauterbach, we can now offer developers additional functionality for debugging software on the RISC-V IP. Developers working with our processor core will benefit from the advantages of working with a first-class tool."
Lauterbach's toolset provides multicore debugging on individual hardware threads of RISC-V cores and enables debugging directly from the reset vector needed to test start-up codes and other key functions. Lauterbach also provides high-level and assembly debugging for a variety of standard ISA extensions, such as compressed instructions and floating points. In addition, the JTAG debug transport module (DTM) is fully supported. The EMSA5-FS is suitable for the implementation of microcontrollers in the automotive industry, aerospace, medical technology and other safety-critical devices and systems.
The IPMS stands for applied research and development in the well-known Fraunhofer tradition. Its focus is on industrial manufacturing, medical technology and improving the quality of life. Its research concentrates on miniaturized sensors and actuators, integrated circuits, wireless and wired data communication and customer-specific MEMS systems.
The Dresden institute has years of experience in the development of IP cores for automotive communication and has a family of TSN IP cores. More than 150 applications worldwide use Fraunhofer IPMS IP cores, many of them in the field of in-vehicle networking.
The multidisciplinary IP design team at IPMS with expertise in domain-specific computer architectures, network structures, RTL design and implementation of electronic systems is also available as a competent development partner for application-specific adaptations of the IP cores and their integration into complex network architectures.
Lauterbach is a leading manufacturer of complete, modular and expandable microprocessor development tools and has experience in embedded design since 1979. The internationally oriented and well-established company with blue chip customers in all parts of the world works closely with all semiconductor manufacturers. The head office is in Höhenkirchen near Munich. There are subsidiaries in Great Britain, Italy, France, Tunisia, on the east and west coasts of the United States, in Japan and China.
