Keysight Technologies has introduced a Universal Signal Processing Architecture (USPA) prototyping platform that enables semiconductor companies to perform full chip prototyping and pre-tapeout verification in a real-time development environment. It integrates digital twins of fully compliant, standards-based signals.
The final step in the chip design process, known as silicon tapeout, is an increasingly expensive process that leaves no margin for error in the design. If a design fails during tapeout, chip manufacturers have to start all over again with a new 're-spin', which can take twelve months or longer. This re-spin not only ties up valuable research and development resources, but can also cause the chip manufacturer to miss a tight time-to-market window.
To reduce the risk of design errors and re-spins, the USPA platform provides chip designers and engineers with full signaling via digital twins to verify designs before they are implemented in silicon. The USPA platform offers designers an alternative to proprietary, custom prototyping systems by integrating signal converters with a fully modular field-programmable gate array (FPGA) prototyping system.
The USPA prototyping platform offers the following advantages:
- Support for the highest performance optoelectronic development projects, with digital-to-analog converter (DAC) and analog-to-digital converter (ADC) interfaces that emulate full-speed signals, up to 68 GS/s (ADC) and 72 GS/s (DAC)
- A wide range of input and output interfaces suitable for applications such as 6G wireless development, high-frequency digital storage, advanced physics research and high-speed data acquisition applications such as radar and radio astronomy
- Flexibility with two configurations, including a pre-configured system for single channel transceiver applications and a fully configurable set of modular components that can be combined to support a wide range of single and multi-channel applications. In addition, the pre-configured system can be expanded with additional components that leverage the modularity, scalability and cost-effective reusability of the platform architecture.
"With the USPA platform, we can optimize and verify our design in real time"
Hong Jiang, CEO Avance Semi
Hong Jiang, CEO of Avance Semi, talks about the development. "When we started working on our first ASIC for the coherent fiber optic communication market, we knew we would only have one chance to get it right. A second tapeout would be both hugely expensive and so time consuming that we could miss our window to market. With the USPA platform and our approach to system integration, we can optimize and verify our design in real time as it evolves. It's like a 'free soft tapeout' that we can do as often as we need to."
A platform for the digital twin
According to Dr. Joachim Peerlings, Vice President and General Manager of Keysight's Network and Data Center Solutions Group, Keysight USPA accelerates chip development and reduces risk: "It provides a new end-to-end solution that addresses the challenges of leading-edge designs in a costly environment. This powerful platform gives designers a digital twin of their future silicon device so they can fully validate their designs and algorithms before incurring the cost and risk of tapeout."
