Edge AI-capable Risc-V core

Edge AI-capable Risc-V core

The Fraunhofer Institute for Photonic Microsystems IPMS, Dresden, offers ready-made, platform-independent IP core modules. With these IP modules, developers can quickly adopt complete functional areas in standard products such as SoCs, microcontrollers, FPGAs and ASICs and thus significantly reduce development times and costs. With the EMSA5, IPMS offers a processor core based on the open RISC-V instruction set architecture. Its current version is suitable for edge AI applications.

The Fraunhofer Institute for Photonic Microsystems IPMS, Dresden, offers ready-made, platform-independent IP core modules. With these IP modules, developers can quickly adopt complete functional areas in standard products such as SoCs, microcontrollers, FPGAs and ASICs, thus significantly reducing development times and costs. With EMSA5, IPMS offers a processor core based on the open RISC-V instruction set architecture. Its current version is suitable for edge AI applications.

In the latest release, the institute has ported Tensorflow lite to the EMSA5 RISC-V. This port ensures that the EMSA5 RISC-V processor core is suitable for edge AI applications. Possible applications include sensor data evaluation, gesture control and vibration analysis.

"Edge AI means that AI algorithms are executed either directly on the device or on a server close to the device. The data collected directly from the device is used for this - without the need to connect to the internet or the cloud. Only the results of the processing are then fed into the cloud. This enables the devices to make autonomous decisions within milliseconds using AI," explains Dr. Andreas Weder, Group Leader Module Integration at the Fraunhofer Institute IPMS.

So-called machine learning models are used to process the data. Such a model is trained on the basis of data sets in order to recognize patterns - initially on the training data set and later with real data, for example from sensors. This enables it to derive new facts from existing data and apply them to a specific context in order to make predictions. Weder: "Applications with low latency requirements can benefit from this type of processing, as there are no delays caused by transmission to the cloud."

Significant increase in security

The system can also work with unstable internet connections and is not dependent on data processing in the cloud. According to Weder, this is a "major advantage for mobile or self-sufficient applications and for locations with unstable data connections".

The approaches of relying on local AI capabilities of the systems bring several tangible benefits: As the number of IoT devices is increasing enormously worldwide and therefore potentially more and more data is being sent to the cloud, the scalability of a system plays a major role, for one thing. Furthermore, data security is of particular interest these days: The more data that has to be sent wirelessly to the cloud, the more points of attack an IoT system offers. The use of edge systems makes such external attacks more difficult, as the data is processed locally in a closed network. "We have ported Tensorflow lite to the EMSA5 RISC-V. Our users can now easily implement edge AI applications such as sensor data analysis, gesture recognition or vibration analysis," explains Weder. The EMSA5 processor core from Fraunhofer IPMS can be made available for any FPGA platform. Integration into customer-specific ASICs for any foundry technology is also possible. As the EMSA5-FS processor core is the first RISC-V processor core to be certified as ASIL-D ready according to Automotive Functional Safety and is therefore suitable for use in safety-critical systems in vehicles, the developers of the processor core also expect a growing number of use cases in this area.

System developers using the EMSA5 processor core can use open source RISC-V development environments, test tools and libraries, including the GNU toolchain and the comprehensive Eclipse IDE with OpenOCD debug support. IPMS also works with commercial third-party compilers and software tools such as the IAR Embedded Workbench to enable software development in the context of functional safety. At the beginning of June, for example, IPMS announced the availability of another important debugger for the processor core: the TRACE32 toolset from Lauterbach now also supports the EMSA5-FS and offers developers extensive debugging functions for this.

  • Issue: Januar
  • Year: 2020
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