ESTC 2024 from 11.09. to 13.09. in Berlin!
This year's IEEE ESTC conference will take place at the Hotel MOA Berlin. Around 120 oral and 70 poster presentations are planned, covering new developments in advanced packaging, wafer-level packaging, electronic device reliability and power electronics, to name just a few topics. As in previous years, the conference papers will be published in the conference proceedings and in the IEEE Xplore database. We would like to take this opportunity to highlight the four keynote speakers who have been invited to give presentations this year. Firstly, there is Johanna M. Swan. As an Intel Fellow and Director of Package Research and Systems Solutions in Components Research within Technology Development at Intel Corporation, she leads a multidisciplinary team of researchers charged with developing novel technologies and package architectures. An expert in advanced electronics packaging technologies, Swan began her career at Intel in 2000, initially focusing on package solutions for wireless storage systems. Since assuming her current position in 2006, Swan and her team have developed numerous innovative packaging technologies, including a multi-die interconnect silicon bridge and associated printing technology (EMIB). She holds over 150 patents, mainly in the field of electronic packaging. The keynote lecture by Dr. Michael Hosemann entitled "Electronics Integration: Challenges in Computed Tomography Scanners" promises a completely different insight and overview. Dr. Michael Hosemann is Head of Digital Electronics at the "Healthineers Computed Tomography Detector Center" at Siemens. His work covers a broad spectrum from the development of front-end mixed-signal ASICs, PCB designs and developments for ASIC control and data processing to wireless data transmission. The final day of the conference will feature two keynote speakers. Subramanian S. Iyer, director of the National Advanced Packaging Manufacturing Program (NAPMP) and distinguished professor at UCLA with the Charles P. Reames Endowed Chair in Electrical Engineering, promises insights into current and future development trends with the title "Packaging: Then, Now and in the Future". As a former IBM Fellow, he developed important technologies such as SiGe-based HBT and embedded DRAM. He advanced innovative package and device solutions and worked on wafer-level package architectures for medical technology applications.
The presentation by Dr. Yasumitsu Orii entitled "Challenges and Opportunities of Semiconductor Packaging in the Chiplet Era" also promises to be interesting. Dr. Yasumitsu Orii was one of the first to work in the field of flip-chip organic packaging, which has made a significant contribution to the miniaturization of hard drives in laptops and servers. He developed the C2 technology for low-cost flip-chip bonding in consumer electronics, which was licensed to a Taiwanese company. At IBM Research Tokyo, he led projects on 3D IC and neuromorphic computing.
In addition, many other interesting presentations await you. You can find the exact program on the website at
https://www.estc-conference.net/program/
Other highlights include four training courses on the morning of the first day of the conference, an EPS HIR workshop, special sessions on the ChipsAct and IPCEI project, photonics and quantum computing as well as a panel discussion on "Chiplet architectures for the automotive industry".
Hotel MOA Berlin - exterior view and a first impression from the inside
Don't miss it! Register for the IMAPS Fall Conference on October 17 and 18 in Munich like every year!
Of course, we would like to take this opportunity to draw your attention to the upcoming fall conference. As every year, we will be meeting in Munich at the Technical University. We are expecting speakers from research and development as well as from industry with interesting and new results on current topics in packaging technology (the exact program will be published on our homepage as soon as it has been compiled). We will also be welcoming several exhibitors again. These include AEMtec GmbH and Gantner Instruments GmbH. We are also particularly pleased that budatec GmbH has already secured a place among the exhibitors, as it does every year. You can look forward to two days full of interesting talks and discussions on all aspects of assembly and connection technology, from theoretical considerations and technological aspects to the finished system and, of course, an evening together in the Augustiner.
Pictures of the last Autumn Conference 2023 (right: the speakers)
Calendar of events
Place |
Period |
Event name |
Organizer |
Berlin |
September 11 - 13, 2024 |
Electronics System-Integration Technology Conference (ESTC) |
IEEE, IMAPS |
Boston, USA |
Sept. 30 - Oct. 3, 2024 |
57th International Symposium on Microelectronics |
IMAPS USA |
Munich, Germany |
October 17-18, 2024 |
Fall Conference |
IMAPS DE |
Tours, France |
November 28, 2024 |
Power Electronics and Packaging European Workshop |
IMAPS France |
Phoenix, USA |
March 3 - 6, 2025 |
Device Packaging Conference |
IMAPS USA |
IMAPS Germany - Your association for packaging and interconnection technology
IMAPS Germany, part of the International Microelectronics and Packaging Society (IMAPS), has been the forum in Germany for all those involved in microelectronics and packaging technology since 1973. With almost 300 members, we essentially pursue three important goals:
- we connect science and practice
- we ensure the exchange of information among our members and
- we represent the point of view of our members in international committees.
Imprint
IMAPS Germany e. V.
Kleingrötzing 1, D-84494 Neumarkt-St. Veit
1st Chairman: Prof. Dr.-Ing. Martin Schneider-Ramelow, Director of the Fraunhofer Institute for Reliability and Microintegration (IZM),
Treasurer
(for questions about membership and contributions):
Ernst G. M. Eggelaar,
You can find detailed contact information for the members of the Executive Board at www.imaps.de
(Executive Board)